CRAC Bilingual Manual: Digital Logic Gates | 数字逻辑门 (22 questions)

The two-input AND gate is one of the simplest digital logic circuits. If the two inputs are respectively 00, 01, 10, 11, the corresponding outputs are:

1. A0, 0, 0, 1
2. B0, 1, 1, 1
3. C0, 1, 0, 1
4. D1, 0, 1, 0

The two-input OR gate is one of the simplest digital logic circuits. If the two inputs are respectively 00, 01, 10, 11, the corresponding outputs are:

1. A0, 1, 1, 1
2. B0, 1, 1, 0
3. C0, 1, 0, 1
4. D1, 0, 1, 0

The two-input XOR (exclusive-OR) gate is one of the simplest digital logic circuits. If the two inputs are respectively 00, 01, 10, 11, the corresponding outputs are:

1. A0, 1, 1, 0
2. B0, 1, 0, 1
3. C0, 1, 1, 1
4. D1, 0, 1, 0

The two-input NAND (NOT-AND) gate is one of the simplest digital logic circuits. If the two inputs are respectively 00, 01, 10, 11, the corresponding outputs are:

1. A1, 1, 1, 0
2. B0, 1, 1, 1
3. C0, 1, 0, 1
4. D1, 0, 1, 0

The two-input NOR (NOT-OR) gate is one of the simplest digital logic circuits. If the two inputs are respectively 00, 01, 10, 11, the corresponding outputs are:

1. A1, 0, 0, 0
2. B0, 1, 1, 1
3. C0, 1, 0, 1
4. D1, 0, 1, 0

The two-input XNOR (exclusive-NOR / equivalence) gate is one of the simplest digital logic circuits. If the two inputs are respectively 00, 01, 10, 11, the corresponding outputs are:

1. A1, 0, 0, 1
2. B0, 1, 1, 1
3. C1, 1, 0, 0
4. D0, 1, 1, 0

A D flip-flop is a sequential logic circuit with data input D, clock input CK, and data output Q. Suppose the D flip-flop is triggered by the rising edge of CK; its operation is:

1. Aeach time a CK rising edge arrives, Q becomes equal to D
2. Beach time a CK rising edge arrives, Q is inverted from D
3. Ceach time a CK falling edge arrives, Q is inverted from D
4. Deach time a CK falling edge arrives, Q becomes equal to D

A D flip-flop has data input D, clock input CK, and data output Q. If the inverted Q is fed back to D, what happens on each CK rising edge?

1. Afrequency divide by 2; if CK frequency is f, the Q output frequency is f/2
2. Bfrequency multiply by 2; if CK frequency is f, the Q output frequency is 2f
3. Cphase shift: the Q output is 90° from CK
4. Dinversion: the Q output is 180° from CK

When building SDR (software-defined radio) projects, especially direct-RF-sampling digital transceivers, we use a field-programmable logic device called an FPGA. In an SDR system, an FPGA can be used to: (Choose all that apply.)

1. Aimplement wideband digital mixing, digital filtering, channelized sample decimation, or sample-rate conversion
2. Bcreate a CPU inside the device, or use the device’s built-in CPU to fully implement the SDR system
3. Cprovide parallel computing functions, assisting in improving the signal-processing capability of an external computer system
4. Dact as a solid-state drive, helping the external computer system save station logs and contest recordings

The first step of digital signal processing (DSP) is converting the analog signal to a digital signal. To ensure the frequency components of the analog signal do not alias in the captured samples, the sampling rate of the analog-to-digital converter (ADC) must be higher than:

1. Atwice the highest frequency component in the input signal
2. Bthe complexity of the input signal’s waveform
3. Cone half of the lowest frequency component in the input signal
4. Dthe noise relative bandwidth of the input signal

The first step of digital signal processing (DSP) is converting the analog signal to a digital signal. The quantization precision of the analog-to-digital converter (ADC) used depends on:

1. Athe complexity of the input signal’s waveform
2. Btwice the highest frequency component in the input signal
3. Cone half of the lowest frequency component in the input signal
4. Dthe noise relative bandwidth of the input signal

During digital-to-analog conversion, to correctly reconstruct the analog signal the DAC’s sample rate should be at least the input sample rate. But if interpolation is used in the DAC to obtain a higher sample rate, then: (Choose all that apply.)

1. Athe DAC’s frequency response becomes flatter
2. Bthe residual spurs after DAC are easier to filter out
3. Cwaveform details lost during sampling will be recovered
4. Dresidual aliasing from imperfect sampling will be restored to correctly-frequency useful signals

Convert an analog signal of frequency f and maximum voltage U into a digital signal. If the digital signal must reflect amplitude detail equivalent to 0.1% of U and time detail equivalent to the 8th harmonic of f, the ADC must satisfy:

1. Asample rate greater than 16f, quantization precision no lower than 10 bits
2. Bsample rate greater than 8f, quantization precision no lower than 10 bits
3. Csample rate greater than 4f, quantization precision no lower than 8 bits
4. Dsample rate greater than 10f, quantization precision no lower than 9 bits

When writing SDR software, hams often use an I/Q sequence centered at 0 Hz, using both positive and negative frequency regions to fully express the signal’s baseband information. This form of digital signal is also called a “complex signal”; its advantages are: (Choose all that apply.)

1. Ait lowers the sequence’s sample rate to the minimum, saving signal-processing resource overhead
2. Bit simplifies the signal’s amplitude and phase computation, reducing software complexity
3. Cit facilitates implementation of complex digital modulation and common analog modulation
4. Dacquiring the RF input or restoring the RF output needs only one ADC or DAC

In an SDR transceiver, the main functions are all implemented by digital signal-processing algorithms, including: (Choose all that apply.)

1. Amixing
2. Bfiltering
3. Cmodulation
4. Ddemodulation

Since analog filters already support amateur radio communication successfully, why do we still develop and use digital filters?

1. Adigital filters are the most flexible; they can be customized into various passband shapes while maintaining optimal performance
2. Bdigital filters can serve as high-performance band preselectors in advanced receivers
3. Cdigital filters have no capacitor breakdown or inductor overheating, so they tolerate high power
4. Ddigital filters need no math-computation-unit support, so they have low operating cost

In an SDR system, mixing (frequency translation) of I/Q signals can be done using the algorithm:

1. Acomplex multiplication
2. Bcomplex addition
3. Ccomplex subtraction
4. Dcomplex square root

In an SDR system, demodulating an AM complex signal can be done using the algorithm:

1. Acompute the magnitude (modulus) of the complex number
2. Bcompute the argument (phase angle) of the complex number
3. Ccompute the cosine of the complex number
4. Dcompute the exponential of the complex number

Digital filters in an SDR system come in several types. The common ones are: (Choose all that apply.)

1. Afinite impulse response (FIR) filter
2. Binfinite impulse response (IIR) filter
3. CSallen–Key filter
4. Dstate-variable filter

When building an SDR transmitter, the algorithms that can generate an SSB (single sideband) signal are: (Choose all that apply.)

1. Athe filter method
2. Bthe phasing method
3. Cthe Weaver method
4. Dthe limiting method

In an SDR system, the fast Fourier transform (FFT) can be used to: (Choose all that apply.)

1. Aanalyze the frequency components of a signal
2. Bgenerate FIR filter coefficients
3. Cimplement modulation and demodulation functions
4. Dimplement fast convolution operations

When using an SDR transceiver, we often see window-function options related to the spectrum display in the system settings, such as Hamming, raised cosine, or Blackman. These are mainly used to: (Choose all that apply.)

1. Areduce spectral leakage in the FFT analysis and reveal the true characteristics of the signal’s power spectrum
2. Bimprove the amplitude or frequency precision of the FFT analysis, thereby enhancing observation accuracy
3. Cprevent the result of the FFT computation from exceeding the width of the spectrum display window on the screen
4. Dimprove the observation precision of amplitude- or frequency-keyed signals such as CW or RTTY